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๐Ÿ’ก EE's DEV/FPGA

[FPGA] NIOS II Tutorial Helloworld

by Danna 2018. 8. 8.
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00 ์ฐธ๊ณ ํ•œ ๋™์˜์ƒ 
  • Altera FPGA tutorial - "Hello World" using NIOS II processor on DE1 Board
  • A learning tutorial for Beginners to display "Hello World" on NIOS II console.
  • https://youtu.be/1a_cD6FBROA

01 Quartus - Board ์…‹ํŒ… ๋ฐ Project ์ƒ์„ฑ
  • USB Blaster ๋กœ ๋ณด๋“œ์™€ ์ปดํ“จํ„ฐ ์ปค๋„ฅํŒ…ํ•ด์•ผํ•จ
  • Board name : Cyclone V SoC 5CSEMA5F31C6 Device

02 Qsys 
  • IP Catalog ์—์„œ NIOS II Processor, On-Chip Memory, JTAG ํ•ญ๋ชฉ๋“ค์„ ์ถ”๊ฐ€ํ•œ๋‹ค.
  • nios2 ๋Š” economy version ์„ ํƒ

03 Qsys - Connections 
  • clk_0์—์„œ ๋‚˜์˜ค๋Š” clk, clk_reset ์„ nios2, onchip, JTAG์— ์—ฐ๊ฒฐ
  • nios2์—์„œ ๋‚˜์˜ค๋Š” data_master ์„ onchip, JTAG์— ์—ฐ๊ฒฐ
  • nios2์—์„œ ๋‚˜์˜ค๋Š” instruction_master ์„ onchip์— ์—ฐ๊ฒฐ
  • clk_0์—์„œ ๋‚˜์˜ค๋Š” clk_in_reset ์„ nios2์— ์—ฐ๊ฒฐ (๋™์˜์ƒ์—์„œ๋Š” ๋งˆ์ง€๋ง‰์— ํ•จ)

04 Qsys - Nios II Processor ์„ค์ •
  • Vectors - Reset Vector ์„ onchip_memory2_0.s1 ์œผ๋กœ ์„ค์ •
  • Vectors - Exception Vector ์„ onchip_memory2_0.s1 ์œผ๋กœ ์„ค์ •

05 Qsys - System
  • address ์ค‘๋ณต๋˜๋Š” ์—๋Ÿฌ๋ฅผ ๋ฐฉ์ง€ํ•˜๊ธฐ ์œ„ํ•ด์„œ ์ˆ˜๋™ ์„ค์ • ํ˜น์€ ์ž๋™ ์„ค์ •
  • ํ•ด๋‹น ๋™์˜์ƒ์—์„œ๋Š” System - Base address ์‚ฌ์šฉ
  • [ finish ] proj_qsys ๋กœ ์ €์žฅํ•œ๋‹ค.
  • Generate ๋˜‘๊ฐ™์€ ์ด๋ฆ„์œผ๋กœ ์ €์žฅํ•ด์ค€๋‹ค.

07 Quartus - Files ์ƒ์„ฑ
  • Project Navigator - Files - Add/Remove Files in Project
  • proj_helloword\proj_qsys\synthesis\proj_qsys.qip ํŒŒ์ผ์„ ์ถ”๊ฐ€ํ•œ๋‹ค.
  • Compile Design - Analysis & Synthesis ์‹คํ–‰
  • Assignments - Assignment Editor ์—์„œ clk_clk ๋ฅผ 50Mhz CLOCK [Pin No=PIN_AF14]๋กœ ๋งค์นญํ•ด์คŒ [DE1-SoC_User_manual Table 3-5์ฐธ๊ณ ]
  • Compile 

08 NIOS II - C์–ธ์–ด ์ฝ”๋”ฉ์„ ์œ„ํ•œ Eclipse 
  • Tools - Nios II Software Build Tools for Eclipse
  • workspace ๋Š” ์šฐ๋ฆฌ๊ฐ€ ๋งŒ๋“  Project๊ฐ€ ์žˆ๋Š” ํด๋”๋ฅผ ์„ ํƒํ•œ๋‹ค. 
  • Project Explorer - New - Nios II Application and BSP from Template
  • Target hardware infomation - ์šฐ๋ฆฌ๊ฐ€ ๋งŒ๋“  Project ํด๋”์— proj_qsys.sopcinfo ํŒŒ์ผ์„ ์„ ํƒํ•œ๋‹ค.
  • ์šฐ๋ฆฌ๋Š” ํ•˜๋‚˜์˜ ํ”„๋กœ์„ธ์„œ๋งŒ ๊ฐ€์ง€๊ณ  ์žˆ๊ธฐ์— CPU name ์—๋Š” ํ•˜๋‚˜๋งŒ ๋œฌ๋‹ค. 
  • Project name : proj_nios, Templates : Hello World Small prints  [Finish]
  • proj_nois - Build Project // ๋ณด๋“œ์— .sof ํŒŒ์ผ์ด ํ”„๋กœ๊ทธ๋ž˜๋ฐ ๋˜์–ด์žˆ๋‹ค.

09 Quartus - Programmer [ DE1-SoC_User_manual_v1.2.2.pdf ์ฐธ๊ณ  ]
  • Auto Detect - Selct 5CSEMA5 
  • SOCVHPS [ HPS device ] ์™€ 5CSEMA5 [ FPGA device ] ๋‘ ๊ฐœ์˜ Device๊ฐ€ ๋“ฑ๋ก๋œ ๊ฒƒ์„ ํ™•์ธ
  • FPGA device ์—์„œ change file - output_files\proj_qsys.sof ํŒŒ์ผ์„ ์„ ํƒํ•œ๋‹ค.
  • FPGA device ์˜ Program/Configure ์ฒดํฌ๋ฐ•์Šค์— ์ฒดํฌํ•œ ํ›„ Start
  • cdf ํŒŒ์ผ ์ €์žฅ

10 NIOS II - RUN
  • proj_nios - Run As - Nios II Hardware
  • Connctions์— DE-SoC ๊ฐ€ ๋œจ์ง€ ์•Š์œผ๋ฉด Target Connection - Refresh Connections ํด๋ฆญ
  • System ID checks - ๋‘ ๊ฐœ์˜ ์ฒดํฌ๋ฐ•์Šค ์„ค์ •
  • Apply - Run

11 RESULT




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